---
title: "Silicon Photonics in 2026: What's Actually Shipping vs. What's Still a Slide Deck"
slug: "silicon-photonics-co-packaging-2026"
category: "Technology Trends"
tags: ["silicon photonics", "co-packaged optics", "CPO", "800G", "1.6T", "datacenter"]
seo_focus_keyword: "silicon photonics co-packaged optics 2026"
word_count_target: 1200
difficulty: advanced
---

The silicon photonics hype cycle has been running long enough that some of us are getting repetitive stress injuries from rolling our eyes at press releases. Every year, a new round of announcements claims the era of co-packaged optics (CPO) has arrived, that pluggable transceivers are dinosaurs awaiting the meteor, and that your entire optical inventory strategy needs rethinking. Most of it lands somewhere between premature and outright fiction. But underneath the noise, real things are happening — and in 2026, the signal-to-noise ratio has finally improved enough to have an honest conversation.

**What silicon photonics actually is, briefly**

Silicon photonics integrates optical components — waveguides, modulators, photodetectors — onto silicon substrates using standard CMOS fabrication. The appeal is obvious: leverage the trillion-dollar semiconductor manufacturing ecosystem to produce optical devices at semiconductor scale and cost. The challenge has always been that silicon is a poor light emitter (indirect bandgap), so lasers must be bonded or coupled from III-V materials, adding process complexity.

Co-packaged optics takes this a step further: instead of a pluggable transceiver in a front-panel cage, the optics are integrated directly onto the switch ASIC package, reducing the electrical path from chip to fiber to near-zero. This matters enormously above 800G, where driving high-speed SerDes signals across PCB traces and connectors becomes thermally and electrically expensive.

**What is actually shipping in 2026**

Let's be precise about "shipping." Shipping means you can buy it in volume, put it in a production network, and get vendor support when it breaks at 2 AM.

By that standard, silicon photonics transceivers in pluggable form factors — QSFP-DD and OSFP — are genuinely shipping and have been for a couple of years. Coherent 400ZR implementations from vendors like Cisco (QDD-400G-ZR-S), Ciena, and Lumentum's OEM supply chain all use SiPh modulator technology. The 400G FR4 and DR4 modules from multiple vendors — Intel, Inphi (now Marvell), II-VI (now Coherent) — are SiPh-based in varying degrees. This is not a future thing; you're probably already running silicon photonics in your network.

Where things get murkier is CPO itself. Intel's Integrated Photonics Solutions division demonstrated CPO integration with Tofino derivatives, and their "Co-Packaged Optics Reference Platform" made the rounds. Broadcom has shown CPO integration with their Tomahawk and Trident ASIC families. Arista announced CPO intent. None of this was available for general purchase in production quantities as of Q1 2026. The honest timeline for CPO in production fabrics is 2027–2028 for early adopters, 2029–2030 for broad enterprise availability. Anyone telling you otherwise has confused "sampling to hyperscalers under NDA" with "available."

**The CPO timeline reality check**

CPO faces problems that are not merely engineering — they are systemic. The most underappreciated one is serviceability. A pluggable transceiver can be hot-swapped in seconds. A co-packaged optical module is soldered or mechanically bonded to the switch ASIC. When it fails — and eventually, optics fail — you are replacing the entire switch or returning it to depot. For a hyperscaler with a dedicated spares and logistics operation, this is manageable. For an enterprise with 200 switches in three datacenters and a lean network team, the calculus looks very different.

Then there's the thermal problem. Co-packaging puts a significant heat source — optical transmitters dissipate several watts each, and a 51.2 Tbps switch has a lot of them — directly adjacent to the CMOS switching silicon. Managing this without degrading the ASIC's operational envelope requires sophisticated thermal co-design. Early CPO designs have shown thermal coupling issues that required chassis-level redesigns.

The fiber management story is also unresolved. Current pluggable deployments allow structured cable management with discrete transceivers. CPO requires fiber connection directly to the switch ASIC area, creating a new set of constraints for cabling density and bend radius management in high-density racks.

**Which vendors are worth watching seriously**

Intel is probably the most credible player in silicon photonics CPO, having acquired Inphi in 2021 and built significant IP. Their 2 µm process for photonics is mature by semiconductor standards. The concern is organizational: Intel's restructuring has shuffled the photonics division's priorities multiple times, and the roadmap continuity is not guaranteed.

Marvell (post-Inphi) has deep DSP expertise and is integrating SiPh transmit/receive into their coherent DSP chiplets. Their 400ZR and 800ZR coherent implementations are technically strong.

Broadcom's approach is more conservative: they are offering CPO as an option on future ASIC generations rather than making it the primary form factor. This is probably the right call for an ecosystem that has to serve both hyperscalers and the broader market.

On the startup side, Ayar Labs has been interesting — their in-package optical I/O approach targets chiplet interconnects rather than front-panel ports, which is a different problem. Lightmatter (now focusing on photonic computing, but with relevant interconnect IP) and Ranovus are worth monitoring.

The OEM ecosystem for coherent transceivers — Acacia (now Cisco), Lumentum, II-VI/Coherent — has largely converged on silicon photonics for the modulator, while maintaining III-V lasers. This hybrid approach is pragmatically solid and likely remains dominant through 2028.

**What it means for your procurement decisions right now**

If you're speccing a datacenter refresh today, buy pluggable. The 800G OSFP and QSFP-DD ecosystem is mature enough for production deployment, silicon photonics-based transceivers offer credible alternatives to traditional InP-based optics for coherent applications, and the cost curves are improving. None of this requires betting on CPO timelines.

If you're designing a greenfield hyperscale-class facility with a 2028+ production date, you should have CPO in your architecture conversations. Not because it will definitely be ready, but because it will likely be ready and you want to design switching room topology, cable plant, and sparing strategies that don't have to be completely unwound when it arrives.

The thermal envelope reality: current 51.2 Tbps ASICs like Broadcom's Tomahawk5 already push the limits of what pluggable optics can handle at full port density. At 102.4 Tbps and beyond, the physics increasingly favor tighter integration. CPO is not a marketing story — it's a thermodynamics argument, and thermodynamics tends to win.

**The one thing the press releases never say**

Silicon photonics manufacturing yield, particularly for CPO, remains below what's needed for commodity pricing. The integration of III-V lasers (still necessary for high-efficiency emission) with silicon waveguides involves bonding processes that are sensitive to temperature gradients and surface cleanliness. Until those yields improve significantly, CPO will carry a cost premium that makes it suitable only for applications where density and power savings outweigh hardware cost — which, at hyperscale, they already do, but at enterprise scale, not yet.

The honest summary: silicon photonics transceivers are real and in your network today. CPO is real engineering with real demonstrations. Volume production for non-hyperscale customers is a 2028 story at the earliest. Plan accordingly, ignore the press releases, and ask any vendor claiming "shipping CPO" exactly what their MTBF data looks like at 6 months of sustained operation.
